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Company: AMD
Location: Markham, ON, Canada
Career Level: Mid-Senior Level
Industries: Technology, Software, IT, Electronics

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE: 

As a Graphics IP Verification Engineer - Methodology & Infrastructure Development, the main focus of your role will be to plan, build and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design.  

 

THE PERSON:  

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Good interpersonal skills (verbal and written).  An organized, enthusiastic self-starter, strong interest in hardware verification methodologies.

 

KEY RESPONSIBILITIES:

  • Architect, develop and deploy, IP methodology infrastructure used in design & verification.
  • Enable re-use of C/C++ based models for use in architecture, functional and performance verification, and software development.
  • Develop and adapt infrastructure and models for hardware design, verification and acceleration solution.
    • Design and implement models and testbenches in UVM, SystemC and C/C++.
    • Automate and improve verification and efficiency.
  • Think outside the box!

 

PREFERRED EXPERIENCE:  

Experience or exposure in the following areas:

  • Developing and integrating high level C++ IP models into UVM-like simulation environments.
  • Experience developing IP verification frameworks and with a good understanding of testbenches, processes and flows.
  • Automating workflows in a distributed compute environment
  • Exposure to HW acceleration for design verification, architectural prototyping, and virtual platforms for SW enablement
  • Exposure to simulation and acceleration environments
  • Strong in C++, preferably on Linux with exposure to Windows platform.
  • Good understanding of the UVM concepts and System Verilog language is an asset.
  • Scripting language experience:  Perl, Ruby, Makefile, shell preferred.

ACADEMIC CREDENTIALS:  

  • Undergrad degree required. BASC/BSEE/CE, or equivalent degree or above preferred. 

 

#LI-BM1

#LI-Hybrid

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.


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