
Description
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
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The Role:
We are looking for a technical leader to join and lead the SOC Power Modeling team in the AMD Client Computing and Graphics group. This role involves collaboration with many engineering teams including SoC architecture definition, IP design, integration/physical design, verification, platform architecture, software, and firmware. Contributions have a direct impact on the power & performance of AMD's Client products.
The Person:
The candidate should have strong SOC design process experience from front end to tapeout. The candidate will lead a team working closely with the SOC design teams on RTL and emulation-based power estimation, simulation and design flow extraction. The candidate must be organized, self-motivated and able to work effectively on teams large and small across multiple sites. He or she must be able to prioritize assignments and drive them to completion. Strong verbal and written communication skills are essential for driving technical discussions to successful and actionable outcomes.
Key Responsibilities:
- Team leader for Hyderabad based power modeling group, work with management to define department objectives and growth plans. Make recommendations to improve processes or procedures as appropriate. Implement changes to engineering processes based on new technologies or industry standards. Work with department management on recruiting, hiring, training, and team evaluations.
- Work with frontend RTL, DFT, Synthesis, and Physical design teams in the development of power intent (UPF) design at SoC level.
- Lead team with power estimates during the pre-silicon design process using Power Artist/PTPX emulation environments and ensure power objectives and goals are met.
- Work with RTL and physical design teams to scientifically assess and manage tradeoffs with impacts of power management options such as, but not limited to clock and power gating, device type mix and physical implementation options.
- Track IP power development through the design cycle ensuring it meets power budgets - leakage/dynamic at every milestone.
- Improve power design flows in areas of power modeling, clock power analysis, structural power validation, IP power intent.
- Work with design verification in validating low power design features at SoC and IP level.
Preferred Experience
- Extensive experience with Synopsys EDA tools, particularly PtPx/Power Artist.
- Detailed understanding of hardware emulation process, stimulus and EDA flow data extraction.
- Ability to define data reporting and requirements needs using EDA flows, Tcl and Python based scripting.
- Ability to work independently and lead a world-wide team.
- Excellent communication skills, written and verbal skills
Academic Credentials
- PhD or Master of Science degree in Electrical Engineering, Computer architecture, or Computer Science.
- 10+ years of experience.
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
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